The present invention relates generally to gating circuits for semiconductor devices and more particularly to gating circuits of the isolated type.
In many instances in the electrical disciplines it is desired to gate a semiconductor device by means of a simple circuit which provides isolation between the device itself and its associated circuitry and the circuitry which is providing the gating signal. It is generally known that isolation can be provided by various means such as optical means or transformers to maintain the actual device circuitry electrically apart from that which generates the gating signal.
One known type of semiconductor device is the field effect transistor (FET) which, when operating in a switching mode, requires a signal of a first polarity (e.g., positive) at its gate electrode to maintain the FET in a conductive state while requiring a signal to the opposite polarity at the gate electrode to insure its nonconducting state.
The customary method of operating a FET is to apply a d.c. bias to the gate electrode and to then apply an over-riding control signal to that electrode to change the FET's conductive state. This type of control becomes difficult when isolation is desired and prior attempts to achieve isolated control have resulted in circuits which are either relatively expensive or which do not provide the requisite stability and operability to function properly over a wide range of operating conditions and component values.